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  ? semiconductor components industries, llc, 2006 december, 2006 ? rev. 3 1 publication order number: mc100ep16vt/d mc100ep16vt 3.3v / 5vecl differential receiver/driver with variable output swing and internal input termination description the mc100ep16vt is a differential receiver functionally equivalent to the 100ep16 with input pins controlling the amplitude of the outputs (pin 1) and providing an internal termination network (pin 4). the v ctrl input pin controls the output amplitude of the ep16vt and is referenced to v cc . (see figure 4.) the operational range of the v ctrl input is from  v bb (a supply at v cc ? 1.42 v, maximum output amplitude) to v cc (minimum output amplitude). v bb is an externally supplied voltage equal to v cc ? 1.42 v (see figures 2 and figure 3). a variable resistor between v cc and v bb , with the wiper driving v ctrl , can control the output amplitude. typical application circuits and a v ctrl voltage vs. output amplitude graph are described in this data sheet. when left open, the v ctrl pin will be internally pulled down to v ee and operate as a standard ep16, with 100% output amplitude. the v tt input pin offers an internal termination network for a 50  line impedance environment, shown in figure 1. for further reference, see application note and8020, termination of ecl logic devices. input considerations are required for d and d under no signal conditions to prevent instability. special considerations are required for differential inputs under no signal conditions to prevent instability. features ? 220 ps propagation delay ? maximum frequency > 4 ghz typical (see graph) ? the 100 series contains temperature compensation ? pecl mode operating range: v cc = 3.0 v to 5.5 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = ? 3.0 v to ? 5.5 v ? open input default state ? 50  internal termination resistor ? pb ? free packages are available a = assembly location l = wafer lot y = year w = work week m = date code  = pb ? free package soic ? 8 d suffix case 751 marking diagrams* tssop ? 8 dt suffix case 948r alyw   kp63 1 8 1 8 http://onsemi.com *for additional marking information, refer to application note and8002/d. see detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. ordering information 1 8 kep63 alyw  1 8 dfn8 mn suffix case 506aa 3i m   14 (note: microdot may be in either location)
mc100ep16vt http://onsemi.com 2 1 2 3 45 6 7 8 q v ee v cc figure 1. 8 ? lead pinout (top view) and logic diagram d q d v tt v ctrl 50  d, d ecl data inputs q, q ecl data outputs v ctrl * output swing control v tt termination supply v cc positive supply v ee negative supply table 1. pin description 50  * pin will default low when left open. pin function exposed pad must be connected to a sufficient ther- mal conduit. electrically connect to the most negative supply or leave floating open. ep table 2. attributes characteristics value value internal input pulldown resistor 75 k  internal input pullup resistor n/a esd protection human body model machine model charged device model > 4 kv > 200 v > 2 kv moisture sensitivity, indefinite time out of drypack (note 1) pb pkg pb ? free pkg soic ? 8 tssop ? 8 dfn8 level 1 level 1 level 1 level 1 level 3 level 1 flammability rating oxygen index: 28 to 34 ul 94 v ? 0 @ 0.125 in transistor count 140 devices meets or exceeds jedec spec eia/jesd78 ic latchup test 1. for additional information, see application note and8003/d.
mc100ep16vt http://onsemi.com 3 table 3. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc pecl mode power supply v ee = 0 v 6 v v ee necl mode power supply v cc = 0 v ? 6 v v i pecl mode input voltage necl mode input voltage v ee = 0 v v cc = 0 v v i  v cc v i  v ee 6 ? 6 v v i out output current continuous surge 50 100 ma ma t a operating temperature range ? 40 to +85 c t stg storage temperature range ? 65 to +150 c  ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm 8 soic 8 soic 190 130 c/w c/w  jc thermal resistance (junction ? to ? case) standard board 8 soic 41 to 44 c/w  ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm 8 tssop 8 tssop 185 140 c/w c/w  jc thermal resistance (junction ? to ? case) standard board 8 tssop 41 to 44 5% c/w  ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm dfn8 dfn8 129 84 c/w c/w t sol wave solder pb pb ? free <2 to 3 sec @ 248 c <2 to 3 sec @ 260 c 265 265 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. table 4. dc characteristics, pecl v cc = 3.3 v, v ee = 0 v (note 2) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 30 36 42 31 38 44 32 40 48 ma v oh output high voltage (max swing) (note 3) v cc  v ctrl  v ee 2155 2405 2155 2405 2155 2405 mv v ol output low voltage (max swing) (note 3) v ctrl  v bb 1355 1490 1605 1355 1520 1605 1355 1520 1605 mv v cc  v ctrl > v bb see fig.2 see fig.2 see fig.2 v ctrl = v cc (min swing) 2105 2230 2355 2095 2220 2345 2065 2190 2315 v ih d, d input high voltage (single ? ended) 2075 2420 2075 2420 2075 2420 mv v il d, d input low voltage (single ? ended) 1355 1675 1355 1675 1355 1675 mv v ctrl input voltage (v ctrl ) v ee v cc v ee v cc v ee v cc mv v ihcmr input high voltage common mode range (differential configuration) (note 4) 2.0 2.9 2.0 2.9 2.0 2.9 v i ih input high current (v tt open) 150 150 150  a i il input low current (v tt open) ? 150 ? 150 ? 150  a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. input and output parameters vary 1:1 with v cc . v ee can vary +0.3 v to ? 2.2 v. 3. all loading with 50  to v cc ? 2.0 v. v oh does not change with v ctrl . v ol changes with v ctrl . v ctrl is referenced to v cc . 4. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc100ep16vt http://onsemi.com 4 table 5. dc characteristics, pecl v cc = 5.0 v, v ee = 0 v (note 5) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 30 36 42 31 38 44 32 40 48 ma v oh output high voltage (note 6) v cc > v ctrl > v ee 3855 3980 4105 3855 3980 4105 3855 3980 4105 mv v ol output low voltage (max swing) (note 6) v ctrl  v bb 3055 3190 3305 3055 3220 3305 3055 3220 3305 mv vcc  v ctrl > v bb see fig.2 see fig.2 see fig.2 v ctrl = v cc (min swing) 3805 3930 4055 3795 3920 4045 3765 3890 4015 v ih d, d input high voltage (single ? ended) 3775 4120 3775 4120 3775 4120 mv v il d, d input low voltage (single ? ended) 3055 3375 3055 3375 3055 3375 mv v ctrl input voltage (v ctrl ) v ee v cc v ee v cc v ee v cc mv v ihcmr input high voltage common mode range (differential configuration) (note 7) 2.0 4.6 2.0 4.6 2.0 4.6 v i ih input high current (v tt open) 150 150 150  a i il input low current (v tt open) ? 150 ? 150 ? 150  a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. input and output parameters vary 1:1 with v cc . v ee can vary +2.0 v to ? 0.5 v. 6. all loading with 50  to v cc ? 2.0 v. v oh does not change with v ctrl . v ol changes with v ctrl . v ctrl is referenced to v cc . 7. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc100ep16vt http://onsemi.com 5 table 6. dc characteristics, necl v cc = 0 v; v ee = ? 5.5 v to ? 3.0 v (note 8) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 30 36 42 31 38 44 32 40 48 ma v oh output high voltage (note 9) v cc > v ctrl > v ee ? 1145 ? 1020 ? 895 ? 1145 ? 1020 ? 895 ? 1145 ? 1020 ? 895 mv v ol output low voltage (max swing) (note 9) v ctrl  v bb ? 1945 ? 1810 ? 1695 ? 1945 ? 1780 ? 1695 ? 1945 ? 1780 ? 1695 mv vcc  v ctrl > v bb see fig.2 see fig.2 see fig.2 v ctrl = v cc (min swing) ? 1195 ? 1070 ? 945 ? 1205 ? 1080 ? 955 ? 1235 ? 111 0 ? 985 v ih d, d input high voltage (single ? ended) ? 1225 ? 880 ? 1225 ? 880 ? 1225 ? 880 mv v il d, d input low voltage (single ? ended) ? 1945 ? 1625 ? 1945 ? 1625 ? 1945 ? 1625 mv v ctrl input voltage (v ctrl ) v ee v cc v ee v cc v ee v cc mv v ihcmr input high voltage common mode range (differential configuration) (note 10) v ee +2.0 ? 0.4 v ee +2.0 ? 0.4 v ee +2.0 ? 0.4 v i ih input high current (v tt open) 150 150 150  a i il input low current (v tt open) ? 150 ? 150 ? 150  a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 8. input and output parameters vary 1:1 with v cc . 9. all loading with 50  to v cc ? 2.0 v. v oh does not change with v ctrl . v ol changes with v ctrl . v ctrl is referenced to v cc . 10. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 7. ac characteristics v cc = 0 v; v ee = ? 3.0 v to ? 5.5 v or v cc = 3.0 v to 5.5 v; v ee = 0 v (note 11) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit f max maximum toggle frequency (see figure 8. f max /jitter) > 4 > 4 > 4 ghz t plh , t phl propagation delay to output differential max swing min swing 250 200 300 250 350 300 250 200 300 250 350 300 250 200 300 250 350 300 ps t skew duty cycle skew (note 12) 5.0 20 5.0 20 5.0 20 ps t jitter cycle ? to ? cycle jitter (see figure 8. f max /jitter) 0.2 < 1 0.2 < 1 0.2 < 1 ps v pp input voltage swing (differential configuration) (note 13) 150 800 1200 150 800 1200 150 800 1200 mv t r , t f output rise/fall times max swing q (20% ? 80%) min swing 70 30 120 80 170 130 80 20 130 70 180 120 100 20 150 70 200 120 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 11. measured using a 750 mv source, 50% duty cycle clock source. all loading with 50  to v cc ? 2.0 v. 12. skew is measured between outputs under identical transitions. duty cycle skew is defined only for differential operation whe n the delays are measured from the cross point of the inputs to the cross point of the outputs. 13. v pp (min) is minimum input swing for which ac parameters are guaranteed.
mc100ep16vt http://onsemi.com 6 0.0 0.5 1.0 1.5 2.0 0 10 20 30 40 50 60 70 80 90 100 0.0 0.5 1.0 1.5 2.0 figure 2. v cc ? v ctrl (pin #1) volts (v) output swing (%) figure 3. v cc ? v ctrl volts (v) v pk ? pk v oh v ol 1.42 v bb min swing max swing 1.42 v bb
mc100ep16vt http://onsemi.com 7 figure 4. voltage source implementation, v ctrl pin 1 1 2 3 45 6 7 8 q* v ee v cc d q * d v tt v ctrl v ctrl + 50  50  figure 5. alternative implementations, v ctrl pin 1 1 2 3 45 6 7 8 q* v ee v cc d q * d v tt v ctrl v cc 50  50  v bb v ee figure 6. standard termination method, v tt pin 4 1 2 3 45 6 7 8 q* v ee v cc d q * d v tt v ctrl v ctrl + 50  50  v cc ? 2 v
mc100ep16vt http://onsemi.com 8 figure 7. alternate ?y? termination method, v tt pin 4 1 2 3 45 6 7 8 q* v ee v cc d q * d v tt v ctrl v ctrl + 50  50  v ee r t v cc r t 5.0 v 3.3 v 112  46  0 100 200 300 400 500 600 700 800 900 1000 0 500 1000 1500 2000 2500 3000 3500 4000 1 2 3 4 5 6 7 8 9 10 figure 8. f max /jitter frequency (mhz) (jitter) 0.25 v below v cc 0.75 v below v cc 1.00 v below v cc 1.25 v below v cc 2.00 v below v cc v outpp (mv) jitter out ps (rms) figure 9. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices.) driver device receiver device qd q d z o = 50  z o = 50  50  50  v tt v tt = v cc ? 2.0 v
mc100ep16vt http://onsemi.com 9 ordering information device package shipping ? mc100ep16vtd soic ? 8 98 units / rail mc100ep16vtdg soic ? 8 (pb ? free) 98 units / rail MC100EP16VTDR2 soic ? 8 2500 / tape & reel MC100EP16VTDR2g soic ? 8 (pb ? free) 2500 / tape & reel mc100ep16vtdt tssop ? 8 100 units / rail mc100ep16vtdtg tssop ? 8 (pb ? free) 100 units / rail mc100ep16vtdtr2 tssop ? 8 2500 / tape & reel mc100ep16vtdtr2g tssop ? 8 (pb ? free) 2500 / tape & reel mc100ep16vtmnr4 dfn8 1000 / tape & reel mc100ep16vtmnr4g dfn8 (pb ? free) 1000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps  i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1672/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
mc100ep16vt http://onsemi.com 10 package dimensions soic ? 8 nb case 751 ? 07 issue ah seating plane 1 4 5 8 n j x 45  k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m  1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155  mm inches  scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
mc100ep16vt http://onsemi.com 11 package dimensions dim min max min max inches millimeters a 2.90 3.10 0.114 0.122 b 2.90 3.10 0.114 0.122 c 0.80 1.10 0.031 0.043 d 0.05 0.15 0.002 0.006 f 0.40 0.70 0.016 0.028 g 0.65 bsc 0.026 bsc l 4.90 bsc 0.193 bsc m 0 6 0 6  seating plane pin 1 1 4 85 detail e b c d a g detail e f m l 2x l/2 ? u ? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ? t ? ? v ? ? w ? 0.25 (0.010) 8x ref k ident k 0.25 0.40 0.010 0.016 tssop ? 8 dt suffix plastic tssop package case 948r ? 02 issue a notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. terminal numbers are shown for reference only. 6. dimension a and b are to be determined at datum plane ?w?.
mc100ep16vt http://onsemi.com 12 package dimensions dfn8 case 506aa ? 01 issue d notes: 1. dimensioning and tolerancing per asme y14.5m, 1994 . 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. ??? ??? ??? ??? a d e b c 0.10 pin one 2 x reference 2 x top view side view bottom view a l (a3) d2 e2 c c 0.10 c 0.10 c 0.08 8 x a1 seating plane e/2 e 8 x k note 3 b 8 x 0.10 c 0.05 c a b b dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a3 0.20 ref b 0.20 0.30 d 2.00 bsc d2 1.10 1.30 e 2.00 bsc e2 0.70 0.90 e 0.50 bsc k 0.20 ??? l 0.25 0.35 1 4 8 5 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 mc100ep16vt/d eclinps is a trademark of semiconductor components industries, llc (scillc). literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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